#CV #FPGA #RTL #Verilog
Hello,
I have more than 15 years of experience in FPGA (RTL) programming:
• AMD(Xilinx)/Intel(Altera) FPGAs.
• Experience with interfaces: AXIe, PXIe, PCIe with DMA, DDR1/2/3/4 , highspeed LVDS connection to DAC/ADC, ARINCx, SPI, I2C, UART.
• Programming languages: SystemVerilog (general), Verilog, VHDL, AHDL.
• Experience in the verification of FPGA projects, including the UVM methodology.
For more information, please contact: https://t.me/AntimK